1. Field of the Invention
This invention relates to semiconductor manufacturing, and more particularly to semiconductor wafer handling apparatus and methods.
2. Background of the Related Art
Semiconductor wafers are handled in many types of test and manufacturing equipment. For wafer test equipment, there is often a need to know the orientation of a wafer so that the location and characteristics of test points may be measured against a standard reference. For this and other reasons, wafers are manufactured with index marks such as flats or notches provided in the edge of the wafer. A testing apparatus can position the wafer at a chosen orientation or test a specific section of the wafer by referencing the index mark. Semiconductor manufacturing equipment can use the index mark to reliably position a wafer within a reaction chamber or test station.
There is also often a need to know the location of the center of a wafer. For example, robot arms that handle wafers are preferably able to detect the center of a wafer so that the arm can reliably position the wafer on a testing platform. It is therefore desirable to have a mechanism for finding both the index mark ("notch" or "flat") and the center of a wafer for both testing and manufacturing purposes.
Wafer flat and center finders in the prior art sometimes use a video camera to visually inspect a wafer to determine the location of the index mark and the center of the wafer. Such inspection systems are expensive and complex, requiring substantial signal processing of the video output of the camera and complicated calculations to determine the location of the index mark and the center of the wafer.
Another prior art device mechanically rotates one or more wafers within a wafer cassette to position the index mark in a known location. Such mechanical apparatus are inherently less accurate than non-mechanical approaches to flat and center finding. Such prior art apparatus also tend to generate particles due to rubbing of the wafer against the cassette, which has a tendency to reduce yields of the devices and circuits produced from the wafers.
What is needed is an apparatus and method that will quickly, accurately and economically find the flat or notch on a wafer as well as find the center of the wafer.